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ml2612 family datasheet version: 3 1 ml2612 family datasheet (digest) version 3 revised on 31-oct-07
ml2612 family datasheet version: 3 2 contents contents ...................................................................................................................................................................................................2 general description .................................................................................................................................................................................3 features ...................................................................................................................................................................................................3 block diagram ........................................................................................................................................................................................5 application example ...............................................................................................................................................................................6 pin layout ...............................................................................................................................................................................................8 pin description ............................................................................................................................... .......................................................10 absolute maximum ratings ............................................................................................................................... ...................................12 recommended operating condition ............................................................................................................................... ......................12 electrical characteristics ............................................................................................................................... ........................................13 dc characteristics ............................................................................................................................... .............................................13 power consumption ............................................................................................................................... ...........................................14 ac characteristics ............................................................................................................................... .............................................15 clock ............................................................................................................................... .......................................... 15 reset ............................................................................................................................... .......................................... 15 2 wire serial interface ............................................................................................................................... ................. 16 3 wire serial interface ............................................................................................................................... ................. 17 sai (slave) ............................................................................................................................... ................................ 18 sai (master) ............................................................................................................................... .............................. 19 digital microphone interface ............................................................................................................................... ..... 20 power supply sequence ............................................................................................................................... .....................................21 analog characteristics ............................................................................................................................... .......................................23 digital filter characteristics ............................................................................................................................... ..............................25 revision history ............................................................................................................................... .....................................................26
ml2612 family datasheet version: 3 3 general description the ml2612 family is a low power small size monaural codec with in-built speaker amplifier, ideally suited for portable playback and recording applications. the micropho ne interface (1bit digital) supports mems (silicon) digital microphones for low noise recording systems. for digital signal processing, the ml2612 uses high-pass filters and a 5-band programmable equalizer including 5 channel notch filter to enable flexible sound processing. features 1) cpu interface 2 modes support 1-1) 2 wire serial interface 1-2) 3 wire serial interface 2) serial audio interface (sai) - sampling frequency: 8k, 11.025k, 12k, 16k, 22.05k, 24k, 32k, 44.1k, 48k hz -master/slave selectable - sai_lrclk transfer mode/frame sync. transfer mode selectable - channel data length: 16bit - sai_lrclk positive/negative selectable - 1bit delay/left justified selectable - msb first/lsb first selectable - sai_bclk frequency master mode: 32fs/64fs selectable slave mode : 128fs 3) digital signal processing - high pass filter for wind noise reduction - 5 band programmable equalizer(5 channel programmable notch filter) 4) microphone input - programmable gain amplifier: -12 +35.25db( 0.75db/step ) - gain boost amplifier: 0db +9.75db +19.5db +29.25db - alc function - mems (silicon) microphone digital interface 5) adc dac - 16bit compact adc dac 6) speaker amplifier - btl speaker amplifier - can be use as line output- lin input 1 channel mixing capability - pop noise reduction function 7) clock - 11.2896 54mhz - 256fs / 512fs / 1024fs 8) power supply voltage - lvdd : 1.65 2.75v - hvdd: 2.7 3.6v 9) package size: 4.0mm4.0mm 0.5mm pitch 24pin qfn 2.0mm2.5mm 0.5mm pitch 20pin wcsp
ml2612 family datasheet version: 3 4 10) product line up part # package cpu i/f mic i/f ml2612gd qfn 2 / 3-wire selectable analog/digital selectable ml2614hb wcsp 3-wire analog mic i/f ml2616hb wcsp 3-wire digital mic i/f
ml2612 family datasheet block diagram mdin(2612/6) spout+ spout- audio i/f sai_lrclk sai_bclk sai_sdin sai_sdout pllc micbias pga hvdd hgnd pll vmid cpu i/f mclki min-(ml2612/4) sel min+(ml2612/4) lvdd lgnd ifsel(2612) resetb(2612) s3_sclk/s2_sclk s3_sdata/s2_sdata s3_csb/mclko lin digital mic i/f mdsclko(2612/6) bias adc dac + prg . filter eq / alc version: 3 5
ml2612 family datasheet application example min- spout+ spout- mclki pllc micbias min+ hgnd hvdd sai_lrclk sai_sdin sai_sdout s2_sdata s2_sclk cpu dsp vmid sai_bclk mclko ml2612 line out resetb ifsel (2-wire select mdin mdsclko open lin line in lvdd lgnd version: 3 6
ml2612 family datasheet application example for mems microphone with sdm version: 3 7 min- spout+ spout- mclki pllc micbias min+ sai_lrclk sai_sdin sai_sdout s3_sdata s3_sclk cpu dsp open mdin mdsclko open vmid sai_bclk s3_csb ml2612 line out resetb line in hgnd hvdd lin ifsel ( 3w select lvdd lgnd mems-mic with sdm
ml2612 family datasheet pin layout ml2612gd (24pin qfn) top view sai_sdout s3_sclk/s2_sclk ifsel resetb sai_lrclk sai_bclk 18 17 16 15 14 13 sai_sdin 19 12 mclki s3_sdata/s2_sdata 20 11 s3_csb/mclko lvdd 21 10 pllc lgnd 22 9 micbias mdsclko 23 8 spout- min+ 24 7 spout+ 1 2 3 4 5 6 mdin min- vmid lin hvdd hgnd version: 3 8
ml2612 family datasheet version: 3 9 ml2614hb (20pin wcsp) bottom view sai_sdin s3_sclk sai_lrclk mclki 5 s3_sdata sai_sdout sai_bclk pllc 4 lvdd lin s3_csb micbias 3 lgnd min- hgnd spout- 2 min+ vmid hvdd spout+ 1 d c b a ml2616hb (20pin wcsp) bottom view sai_sdin s3_sclk sai_lrclk mclki 5 s3_sdata sai_sdout sai_bclk pllc 4 lvdd lin s3_csb micbias 3 lgnd mdin hgnd spout- 2 mdsclko vmid hvdd spout+ 1 d c b a
ml2612 family datasheet pin description pin no. qfn wcsp pin name io power description reset state unused pin common terminals for all family products 8 a2 spout- o hvdd speaker ? output hi-z open 7 a1 spout+ o hvdd speaker + output hi-z open 12 a5 mclki i hvdd master clock input (input) - 10 a4 pllc o hvdd capacitor and resistor connect pin for pll stable operation. please set following circuit near by pins as possible. pllc pin hgnd open 3 c1 vmid o lvdd capacitor connect pin for analog reference voltage. please connect 1.0f capacitor between this pin and lgnd. lgnd - 9 a3 micbias o hvdd microphone bias voltage output. please connect 2.2f capacitor between this pin and hgnd. hgnd open 14 b5 sai_lrclk io hvdd sai lr clock input (input) - 13 b4 sai_bclk io hvdd sai bit clock input/output (input) - 19 d5 sai_sdin i hvdd sai serial data input (input) - 18 c4 sai_sdout o hvdd sai serial data output l - 21 d3 lvdd p - low voltage power supply. please connect bypass capacitor between this pin and lgnd. - - 22 d2 lgnd p - low voltage ground - - 5 b1 hvdd p - high voltage power supply. please connect bypass capacitor between this pin and hgnd. - - 6 b2 hgnd p - high voltage ground - - 4 c3 lin i lvdd lin input hi-z open terminals depends on product ml2612gd has all terminals. some pins are limited according with wcsp products. 2 c2 min- i lvdd analog microphone - input apply for ml2612gd and ml2614hb hi-z open 24 d1 min+ i lvdd analog microphone + input apply for ml2612gd and ml2614hb hi-z open 1 c2 mdin i hvdd digital microphone input apply for ml2612gd and ml2616hb (input) open 23 d1 mdsclko o hvdd digital microphone data synchronous clock output apply for ml2612gd, and ml2616hb l open 16 n/a ifsel i hvdd control interface mode select l: 3 wire serial interface h: 2 wire serial interface apply for ml2612gd (input) - 20 d4 s3_sdata /s2_sdata io hvdd 3 or 2 wire serial in terface data io. when 3 wire serial is selected, outp ut interface becomes cmos type. when 2 wire serial is selected, output interface becomes open drain type. please use this pin with external pull-up resister when 2 wire serial is selected. if this pin is used with external pull-up resistor, it possibly gets noise from power. therefore tamper noise design is required in the noisy environment. (input) - version: 3 10
ml2612 family datasheet version: 3 11 17 c5 s3_sclk /s2_sclk i hvdd 3 or 2 wire serial interface clock io. if this pin is used with external pull-up resistor, it possibly gets noise from power. therefore tamper noise design is required in the noisy environment. (input) - 11 b3 s3_csb /mclko io hvdd when ifsel=l, chip select input for 3 wire serial interface. when ifsel=h,256fs clock output. (input)/l -/ open 15 n/a resetb i hvdd active-low reset input. apply for ml2612gd (input) -
ml2612 family datasheet version: 3 12 absolute maximum ratings parameter symbol condition rating unit lvdd supply voltage lvdd D -0.3~3.5 v hvdd supply voltage hvdd D -0.3~4.5 v input voltage vin D -0.3 vdd+0.3 v storage temperature tstg D -55 +125 c power dissipation *1 pd ta=25c 500 mw output current1 iosp spout+/- pin -560~+560 ma output current2 ioo except spout+/- -8 ~ +8 ma note) do not short the output pin to another output pin, power supply pin or gnd pin. (output pin includes an io pin which is in output mode)*1please reffer to the. recommended operating condition parameter symbol condition rating unit lvdd supply voltage lvdd lvdd hvdd 1.65~2.75 v hvdd supply voltage hvdd lvdd hvdd 2.7~3.6 v operating temperature top D -20~+85 c
ml2612 family datasheet version: 3 13 electrical characteristics dc characteristics (lvdd=1.65~2.75v, hvdd=2.7~3.6v, ta=-20~+85c) parameter symbol condition min. typ. max. unit related pin ?h? input voltage vi h hgnd=0v hvdd0.8 D vdd v all digital input ?l? input voltage vil hgnd=0v 0 D hvdd0.2 v all digital input ?h? output voltage voh ioh=-1ma hvdd0.85 D D v except s2_data ?l? output voltage > 1 vol1 iol=1ma D D hvdd0.15 v except s2_data ?l? output voltage2 vol2 iol=3ma, hvdd>2v hvdd<2v D D 0.4 vdd0.2 v s2_data ?h? input leakage cu rrent iih vih=hvdd D D 10 a all digital input ?l? input leakage curr ent iil vil=hgnd -10 D D a all digital input operating current1 lvdd iddo1l D D 9 ma operating current1 hvdd iddo1h playback no load sin1khz-full scale output D D 9 ma operating current2 lvdd iddo2l D D 13 ma operating current2 hvdd iddo2h record sin1khz-full scale input D D 6 ma standby current1 idds1 -20~25c D D 5 a standby current2 idds2 -20~50c D D 15 a standby current3 idds3 -20~85c D D 75 a note) please reffer to the followingpage describing tpical current value. > note) standby current is total value for all power supply currents. >
ml2612 family datasheet version: 3 14 power consumption the following table shows typical operating current under the following conditions (lvdd=1.8v, hvdd=3.0v, ta=25c, no-load, no-signal, pll off) operating condition symbol lvdd(ma) hvdd(ma) total(mw) 8 btl speaker playback (48khz-sampling) iddo1 2.4 2.1 10.62 line output playback (48khz-sampling) iddo2 2.1 1.4 7.98 line input8 btl speaker output(clock stopped) iddo3 0.7 1.7 6.36 line input line output(clock stopped) iddo4 0.5 0.5 2.40 analog mic i/f recording (48khz-sampling) iddo5 5.2 0.7 11.46 digital mic i/f recording(48khz-sampling) iddo6 1.7 0.4 4.26 note) mclki=12.288mhz(256fs), sai ? master, 3wire serial if recording condition: alc and hpf1 are enabled. hp f2 and 5band-programmable equalizer are disabled. playback condition: playback limiter and 5band-programmable equalizer are disabled. (lvdd=2.5v, hvdd=3.0v, ta=25c, no-load, no-signal, pll off) operating condition symbol lvdd(ma) hvdd(ma) total(mw) 8 btl speaker playback (48khz-sampling) iddo1 3.8 2.1 15.80 line output playback(48khz-sampling) iddo2 3.4 0.9 11.20 line input8 btl speaker output(clock stopped) iddo3 1.2 1.7 8.10 line input line output(clock stopped) iddo4 0.8 0.5 3.50 analog mic i/f recording (48khz-sampling) iddo5 7.4 0.7 20.60 digital mic i/f recording(48khz-sampling) iddo6 2.4 0.4 7.20 note) mclki=12.288mhz(256fs), sai ? master, 3wire serial if recording condition: alc and hpf1 are enabled. hp f2 and 5band-programmable equalizer are disabled. playback condition: playback limiter and 5band-programmable equalizer are disabled. (lvdd=1.8v, hvdd=3.0v, ta=25c, no-load, no-signal, pll on) operating condition symbol lvdd(ma) hvdd(ma) total(mw) 8 btl speaker playback (48khz-sampling) iddo1 2.9 3.5 15.72 line output playback (48khz-sampling) iddo2 2.7 2.4 12.06 line input8 btl speaker output(clock stopped) iddo3 0.7 1.7 6.36 line input line output(clock stopped) iddo4 0.5 0.5 2.40 analog mic i/f recording (48khz-sampling) iddo5 5.9 2.1 16.92 digital mic i/f recording(48khz-sampling) iddo6 2.4 1.9 10.02 note) mclki=27mhz, sai ? master, 3wire serial if recording condition: alc and hpf1 are enabled. hp f2 and 5band-programmable equalizer are disabled. playback condition: playback limiter and 5band-programmable equalizer are disabled. (lvdd=2.5v, hvdd=3.0v, ta=25c, no-load, no-signal, pll on) operating condition symbol lvdd(ma) hvdd(ma) total(mw) 8 btl speaker playback (48khz-sampling) iddo1 4.6 3.5 22.00 line output playback(48khz-sampling) iddo2 4.2 2.4 17.70 line input8 btl speaker output(clock stopped) iddo3 1.2 1.7 8.10 line input line output(clock stopped) iddo4 0.8 0.5 3.50 analog mic i/f recording (48khz-sampling) iddo5 8.2 2.1 26.80 digital mic i/f recording(48khz-sampling) iddo6 3.2 2.9 13.70 note) mclki=27mhz, sai ? master, 3wire serial if recording condition: alc and hpf1 are enabled. hp f2 and 5band-programmable equalizer are disabled. playback condition: playback limiter and 5band-programmable equalizer are disabled. standby current typical value is follows (lvdd=2.75v, hvdd=3.6v) parameter symbol condition current value unit standby current1 iddst1 25c 1 a standby current2 iddst2 50c 3 a standby current3 iddst3 85c 15 a note) pop noise reduction bias resistor of spout+ is off state
ml2612 family datasheet ac characteristics clock pll not used (lvdd=1.65~2.75v, hvdd=2.7~3.6v, ta=-20~+85c) parameter symbol min max. unit mclki frequency f c 2.048 49.152 mhz mclki period t c 1/f c 1/f c ns mclki ?h? length t ch tc*0.4 D ns mclki ?l? length t cl tc*0.4 D ns pll used (sai master) (lvdd=1.65~2.75v, hvdd=2.7~3.6v, ta=-20~+85c) parameter symbol min max. unit mclki frequency f c 11.2896 54 mhz mclki period t c 1/f c 1/f c ns mclki ?h? length t ch tc*0.4 D ns mclki ?l? length t cl tc*0.4 D ns note) sai slave can be operated without mclki input because internal clock is generated from sai_lrclk mclki t c , f c t ch t cl reset (lvdd=1.65~2.75v, hvdd=2.7~3.6v, ta=-20~+85c) parameter symbol min max. unit resetb pulse width t w_rst 5 D s resetb t wrst version: 3 15
ml2612 family datasheet 2 wire serial interface (lvdd=1.65~2.75v, hvdd=2.7~3.6v, ta=-20~+85c, cl=30pf) standard mode fast mode parameter symbol min max. min max. unit s2_sclk frequency f scl D 100 D 400 khz s2_sclk "l" length t low 4.7 D 1.3 D s s2_sclk "h" length t high 4.0 D 0.6 D s hold time under repeat [start] condition t hd:sta 4.0 D 0.6 D s setup time under repeat [start] condition t su:sta 4.0 D 0.6 D s data hold time t hd:dat 0 3.45 0 0.9 s data setup time t su:dat 250 D 100 D ns setup time under [stop] condition t su:sto 4.0 D 0.6 D s version: 3 16 t hd:sta t hd:dat t hd:sta t low t high t su:dat t su:sto t su:sta s2_sdata s2_sclk
ml2612 family datasheet 3 wire serial interface (lvdd=1.65~2.75v, hvdd=2.7~3.6v, ta=-20~+85c, cl=30pf) parameter symbol min max. unit sclk low to chip select enable t slcl 100 D ns chip select enable to sclk low t clsl 100 D ns chip select enable to sclk high t clsh 100 D ns sclk high to chip select enable t shcl 100 D ns sclk high pulse width t sh 50 D ns sclk low pulse width t sl 50 D ns input data hold time t idh 30 D ns input data setup time t ids 30 D ns sclk last edge to chip select disable t chs2 100 D ns chip select high pulse width t ch 100 D ns output data valid t odv D 40 ns chip select high to data transition t chdts D 40 ns two kinds of timing is supported depends on the s3_sclk pin level at data transfer start.read or write is selected by lsb logic of index. s3_csb s3_sdata write(input) msb lsb msb lsb t ids t idh t slcl t clsh t sh t chs2 t sl t sh index write data s3_sdata read(output) msb lsb read data t odv t chdts t ch t sl 12 3 4 5 6 7 8 9 10111213141516 1 2 3 4 5 6 7 8 9 10111213141516 s3_sclk (low start) s3_sclk (high start) t shcl t clsl version: 3 17
ml2612 family datasheet sai (slave) (lvdd=1.65~2.75v, hvdd=2.7~3.6v, ta=-20~+85c, cl=30pf) parameter symbol min max. unit sai_bclk period t c_bclk D 128fs hz sai_bclk ?h? length t hw_bclk 73 D ns sai_bclk ?l? length t lw_bclk 73 D ns sai_lrclk hold time t h_lrclk 20 D ns sai_lrclk setup time t su_lrclk 20 D ns sai_sdout delay time t d_sdo *1 D 50 ns sai_sdin setup time t su_sdi 20 D ns sai_sdin hold time t h_sdi 20 D ns *1t d_sdo is the delay time from later one of sai_bclk transition and sai_lrclk transition. sai_lrclk sai_bclk sai_sdout t c_bclk t su_lrclk t h_lrclk t d_sdo t lw_bclk t hw_bclk sai transmit sai_lrclk sai_bclk sai_sdin t c_bcl k t su_lrclk t h_lrcl k t su_sdi t h_sdi t lw_bclk t hw_bclk sai receive version: 3 18
ml2612 family datasheet sai (master) (lvdd=1.65~2.75v, hvdd=2.7~3.6v, ta=-20~+85c, cl=30pf) parameter symbol min max. unit sai_bclk period t c_bclk D 64fs hz sai_bclk ?h? length t hw_bclk 146 D ns sai_bclk ?l? length t lw_bclk 146 D ns sai_lrclk delay time t d_lrclk D 20 ns sai_sdout delay time t d_sdo D 20 ns sai_sdin setup time t su_sdi 50 D ns sai_sdin hold time t h_sdi 0 D ns sai_lrclk sai_bclk sai_sdout t c_bclk t d_lrclk t d_sdo t lw_bclk t hw_bclk sai transmit sai_lrclk sai_bclk sai_sdin t c_bcl k t d_lrclk t su_sdi t h_sdi t lw_bclk t hw_bclk sai receive version: 3 19
ml2612 family datasheet digital microphone interface (lvdd=1.65~2.75v, hvdd=2.7~3.6v, ta=-20~+85c) parameter symbol min max. unit mdsclko period t c_mdsclko D 64fs hz mdsclko ?h? length t hw_ mdsclko 146 D ns mdsclko ?l? length t lw_ mdsclko 146 D ns mdin setup time t su_mdin 50 D ns mdin hold time t h_mdin 0 D ns ml2612gd and ml2616hb support 64fs 1 bit digital audio data transfer. please input 1 bit digital audio data synchronized with mdclko 64fs into mdin. mdsclko mdin t c_mdsclko t su_mdin t h_mdin t hw_ mdsclko t lw_ mdsclko version: 3 20
ml2612 family datasheet power supply sequence please power on/off the lsi with all kind of power at the same time. each power supply should power up/down in 50ms.also keep all power supply in the on state or the of f state. please avoide partial on or partial off status. all of the lsi circuit is initialized by power on reset when power on. to be a certain operation of power on reset, please start vdd level from 0v(gnd level). after power on, this lsi can be controled from the time passed reset time(t pon_rst ). all of the pins status are hi-z during power on reset. parameter symbol min typ max unit power on delay time t vdd_on 0 ? 50 ms power off delay time t vdd_off 0 ? 50 ms power up time t vdd_up ? ? 10 ms reset time after power on t pon_rst ? ? 150 ms powe r suppl y other power supply t vdd_on powersupply*0.9 powersupply*0.9 t vdd_off powersupply*0.1 powersupply*0.1 version: 3 21
ml2612 family datasheet ml261 2 pin state host cp u i n t e r n al st at e please shut dwn pwer s upply fro m lsi po wer do wn state. there are no limi tation for control timing and pow er w a ve form. higher v o ltage o f 1.6 v or powersu pply*0 .9 power supply 0v tv dd _u p inhibit register access power up control control softw a re reset sai_l r c l k/sai_bcl k/ sai_s d out/sai_sdi n unkno wn activate (depend s on re gister setting) s3_s da t a unkno wn a c tivate s3_cs b host cp u pin state a c tive 1 s3_s da t a 1 a c tive 1 sai_s d out/sai_lrc l k/ softw a re reset 1 after ml2 612 po wer u p it activates at ? h ? input to s3_cs b it output ?l? until ml2612 po wer is up. 1 initial i ze n o rmal operation after ml2 612 p ow e r u p it out p ut ? h ? a c tivate after softw a re reset sai _ b c l k/ s ai _ s di n t p on_ rs t 1 input or p ullup or pulldo w n versi on: 3 22
ml2612 family datasheet analog characteristics the following specification is only guarantied when specification is optimized by using ml2612 family trimming registers. (lvdd=1.65~2.75v, hvdd=2.7~3.6v, ta=-20~+85c) parameter symbol condition min typ max unit line input full scale input signal level v linfs lin D D 0.7x lvdd vp-p input resistance r lin D 15 20 25 k : mic input min- D D 0.7x lvdd vp-p full scale input signal level (for adc 0db input at 0db gain) v minfs min+ D D 0.4 vp-p pga volume = +35.25db 0.6 1.5 D k : pga volume = 0db D 44.2 D k : input resistance min- r min- pga volume = -12db D 70.7 88.4 k : input resistance min+ r min+ D 66.3 88.4 111.5 k : line out(spout+, with 10k : /50pf load) dac to line out 0.591 x lvdd 0.695 x lvdd 0.766 x lvdd vp-p full scale output signal level (for 0db input at 0db gain) v loutfs lin to line out 0.667 x lvdd 0.785 x lvdd 0.867 x lvdd vp-p analog reference level(vmid-pin) analog reference voltage v ref D 0.90x lvdd/2 lvdd/2 1.10x lvdd/2 v microphone bias(micbias-pin) imic =1ma, vbcon=0 vmic ml2612 family datasheet (lvdd=2.5v, hvdd=3.3v, ta=25c, 1khz signal, fs=48khz) parameter symbol condition min typ max unit analog inputs to adc out signal to noise ratio snr a-weighted speaker amp off *1 D 90 D db total harmonic distortion thd 1khz,input-3dbfs speaker amp off *1 D 86 D db power supply rejection ratio psrr lvdd on 100mvp-p, 10khz noise, no signal input D 40 D db dac to line out(spout+, with 10k /50pf load) total harmonic distortion thd 1khz,input 0dbfs D 60 D db signal to noise ratio snr a-weighted D 94 D db hvdd on 100mv p-p ,10khz noise, no signal input D 50 D db power supply rejection ratio psrr lvdd on 100mv p-p ,10khz noise, no signal input D 35 D db dac to speaker out(spout+/-, with 8 /50pf load ) output power po thd=10% D 420 D mw total harmonic distortion thd po=310mw, 1khz signal D 40 D db signal to noise ratio snr a-weighted D 84 D db hvdd on 100mvp-p,10khz noise D 60 D db power supply rejection ratio psrr lvdd on 100mvp-p,10khz noise D 35 D db microphone bias(micbias-pin) output noise voltage v micn 22hz to 22khz, v mic =1.6 x v ref D 8.2 D uv power supply rejection ratio psrr hvdd on 100mvp-p,10khz noise D 60 D db *1 speaker amplifier power management register($26h/$27h) spcon = 00h version: 3 24
ml2612 family datasheet version: 3 25 digital filter characteristics parameter symbol condition min typ max unit adc decimation filter dm ps1 +/-0.05db 0 D 0.455fs D passband dm ps2 -6db D 0.5fs D D passband ripple dm lp1 -0.05 D +0.05 db stopband dm st1 0.5465fs D stopband attenuation dm at1 0.5465fs ml2612 family datasheet revision history date page notes notes revisionrevision 07/05/15 all preliminary datasheet release 1.0 07/06/19 all delete ml2613 and ml2615 1.2 07/06/19 3 add sampling frequency 12khz 1.2 07/06/19 14 change power consumption value 1.2 07/06/19 18 add t d_sdo condition 1.2 07/06/19 21 change power up time max value 1.2 07/06/19 23 change analog characteristics condition and value 1.2 07/09/07 12 absoute maximum rating: delete (t.b.d.) for powwer disipation and add output current. 2 07/09/07 13 change operating current value amd delete (t.b.d.) 2 07/09/07 15 change mclki length min value 2 07/09/07 21 change pwer up time and reset time after power on 2 07/09/07 22 change power supply sequence 2 07/09/07 23 change analog characteristics 2 07/09/07 25 digital filter characteristics: change value and delete ( .b.d.) 2 07/10/31 3 change general description 3 07/10/31 23 change analog characteristics(rmin+, vloutfs) 3 version: 3 26
ml2612 family datasheet version: 3 27 notice 1. the information contained herein can change without notice owing to product and/or technical improvements. before using the product, please make sure that the information being referred to is up-to-date. 2. the outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. when planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. when designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. neither indemnity against nor license of a third party?s industrial and intellectual property right, etc. is granted by us in connection with the use of the produc t and/or the information and drawings contained herein. no responsibility is assumed by us for any infringemen t of a third party?s right which may result from the use thereof. 6. the products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communicatio n equipment, measurement equipment, consumer electronics, etc.). these pr oducts are not authorized fo r use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or da mage of property, or death or injury to humans. such applications include, but are not limited to, tr affic and automotive equipmen t, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. certain products in this document may need government approval before they can be exported to particular countries. the purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. no part of the contents contained herein may be reprinted or reproduced without our prior permission. copyright 2006 oki electric industry co., ltd.

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